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PIC18F2331_10 Datasheet, PDF (205/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
19.0 SYNCHRONOUS SERIAL PORT
(SSP) MODULE
19.1 SSP Module Overview
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D Converters, etc. The SSP module
can operate in one of two modes:
⢠Serial Peripheral Interface (SPI)
⢠Inter-Integrated Circuit (I2Câ¢)
An overview of I2C operations and additional
information on the SSP module can be found in the
âPIC® Mid-Range MCU Family Reference Manualâ
(DS33023).
Refer to application note AN578, âUse of the SSP
Module in the I 2C⢠Multi-Master Environmentâ
(DS00578).
19.2 SPI Mode
This section contains register definitions and opera-
tional characteristics of the SPI module. Additional
information on the SPI module can be found in the
âPIC® Mid-Range MCU Family Reference Manualâ
(DS33023).
SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To accomplish
communication, typically three pins are used:
⢠Serial Data Out (SDO)
⢠Serial Data In (SDI)
⢠Serial Clock (SCK)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
⢠Slave Select (SS)
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON (SSPCON<5:0>) and
SSPSTAT<7:6> registers. These control bits allow the
following to be specified:
⢠Master mode (SCK is the clock output)
⢠Slave mode (SCK is the clock input)
⢠Clock polarity (Idle state of SCK)
⢠Clock edge (output data on rising/falling edge of
SCK)
⢠Clock rate (Master mode only)
⢠Slave Select mode (Slave mode only)
ï£ 2010 Microchip Technology Inc.
DS39616D-page 205
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