PIC18F2331_10 Datasheet, PDF (120/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 11-5: PORTC I/O SUMMARY
Pin
Function
TRIS
Setting
I/O
I/O
Type
Description
RC0/T1OSO/
T1CKI
RC0
0
O
DIG LATC<0> data output.
1
I
ST PORTC<0> data input.
T1OSO
x
O
ANA Timer1 oscillator output; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
T1CKI
1
I
ST Timer1/Timer3 counter input.
RC1/T1OSI/
CCP2/FLTA
RC1
0
O
DIG LATC<1> data output.
1
I
ST PORTC<1> data input.
T1OSI
x
I
ANA Timer1 oscillator input; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
CCP2
0
O
DIG CCP2 compare and PWM output; takes priority over port data.
1
I
ST CCP2 capture input.
FLTA
1
I
ST Fault Interrupt Input Pin A.
RC2/CCP1/FLTB
RC2
0
O
DIG LATC<2> data output.
1
I
ST PORTC<2> data input.
CCP1
0
O
DIG CCP1 compare or PWM output; takes priority over port data.
1
I
ST CCP1 capture input.
FLTB
1
I
ST Fault Interrupt Input Pin B.
RC3/T0CKI/
T5CKI/INT0
RC3
0
1
T0CKI⁽¹⁾
1
T5CKI⁽¹⁾
1
O
DIG LATC<3> data output.
I
ST PORTC<3> data input.
I
ST Timer0 alternate clock input.
I
ST Timer5 alternate clock input.
INT0
1
I
ST External Interrupt 0.
RC4/INT1/SDI/
SDA
RC4
0
O
DIG LATC<4> data output.
1
I
ST PORTC<4> data input.
INT1
1
SDI⁽¹⁾
1
SDA⁽¹⁾
0
1
I
ST External Interrupt 1.
I
ST SPI data input (SSP module).
O
DIG I²C™ data output (SSP module); takes priority over port data.
I
I²C I²C data input (SSP module).
RC5/INT2/SCK/
SCL
RC5
0
O
DIG LATC<5> data output.
1
I
ST PORTC<5> data input.
INT2
1
SCK⁽¹⁾
0
I
ST External Interrupt 2.
O
DIG SPI clock output (SSP module); takes priority over port data.
1
SCL⁽¹⁾
0
1
I
ST SPI clock input (SSP module).
O
DIG I²C clock output (SSP module); takes priority over port data.
I
I²C I²C clock input (SSP module); input type depends on module setting.
RC6/TX/CK/SS
RC6
0
O
DIG LATC<6> data output.
1
I
ST PORTC<6> data input.
TX
0
O
DIG Asynchronous serial transmit data output (EUSART module);
takes priority over port data. User must configure as an output.
CK
0
O
DIG Synchronous serial clock output (EUSART module); takes priority
over port data.
1
I
ST Synchronous serial clock input (EUSART module).
SS
1
I
ST SPI slave select input.
Legend:
Note 1:
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
RD0 is the alternate pin for T0CKI/T5CKI; RD2 is the alternate pin for SDI/SDA; RD3 is the alternate pin for SCK/SCL;
RD1 is the alternate pin for SDO.
DS39616D-page 120
 2010 Microchip Technology Inc.