PIC18F2331_10 Datasheet, PDF (67/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
6.5 Data Memory Organization
The data memory in PIC18 devices is implemented as
static RAM. Each register in the data memory has a 12-bit
address, allowing up to 4,096 bytes of data memory. The
memory space is divided into as many as 16 banks that
contain 256 bytes each. PIC18F2331/2431/4331/4431
devices implement all 16 banks.
Figure 6-6 shows the data memory organization for the
PIC18F2331/2431/4331/4431 devices. The data mem-
ory contains Special Function Registers (SFRs) and
General Purpose Registers (GPRs). The SFRs are used
for control and status of the controller and peripheral
functions, while GPRs are used for data storage and
scratchpad operations in the user’s application. Any
read of an unimplemented location will read as ‘0’s.
The instruction set and architecture allow operations
across all banks. The entire data memory may be
accessed by Direct, Indirect or Indexed Addressing
modes. Addressing modes are discussed later in this
subsection.
To ensure that commonly used registers (SFRs and
select GPRs) can be accessed in a single cycle, PIC18
devices implement an Access Bank. This is a 256-byte
memory space that provides fast access to SFRs and
the lower portion of GPR Bank 0 without using the
BSR. Section 6.5.2 “Access Bank” provides a
detailed description of the Access RAM.
FIGURE 6-6:
DATA MEMORY MAP FOR PIC18F2331/2431/4331/4431 DEVICES
BSR<3:0>
= 0000
= 0001
= 0010
Data Memory Map
00h
Bank 0
FFh
00h
Bank 1
FFh
00h
Bank 2
FFh
00h
Access RAM
GPR
GPR
GPR
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
= 0011
= 1110
Bank 3
to
Bank 14
Unused
Read ‘00h’
= 1111
00h
Bank 15
FFh
Unused
SFR
EFFh
F00h
F5Fh
F60h
FFFh
Access Bank
00h
Access RAM Low _5Fh
Access RAM High ^60h
(SFRs)
FFh
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are
General Purpose RAM
(from Bank 0).
The second 160 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the bank
used by the instruction.
 2010 Microchip Technology Inc.
DS39616D-page 67