PIC18F2331_10 Datasheet, PDF (166/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 17-11:
QEA
QEB
QEI MODULE RESET TIMING WITH THE INDEX INPUT
Forward
Reverse
Note 2
Note 2
Count (+/-)
POSCNT⁽¹⁾
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
MAXCNT
INDX
MAXCNT = 1527
IC2QEIF
UP/DOWN
Position
Counter Load
Note 6
Q4⁽³⁾
Q1⁽⁴⁾
Q4⁽³⁾
Q1⁽⁵⁾
Note 1:
2:
3:
4:
5:
6:
POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals).
When an INDX Reset pulse is detected, POSCNT is reset to ‘0’ on the next QEA or QEB edge. POSCNT is set to
MAXCNT when POSCNT = 0 (when decrementing), which occurs on the next QEA or QEB edge. a similar Reset
sequence occurs for the reverse direction, except that the INDX signal is recognized on its falling edge. The Reset
is generated on the next QEA or QEB edge.
IC2QEIF is enabled for one TCY clock cycle.
The position counter is loaded with 0000h (i.e., Reset) on the next QEA or QEB edge when the INDX is high.
The position counter is loaded with a MAXCNT value (e.g., 1527h) on the next QEA or QEB edge following the
INDX falling edge input signal detect).
IC2QEIF must be cleared in software.
DS39616D-page 166
 2010 Microchip Technology Inc.