PIC18F2331_10 Datasheet, PDF(54/392 Page) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

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PIC18F2331_10 Datasheet, PDF (54/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

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PIC18F2331/2431/4331/4431

TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

TOSU

2331 2431 4331 4431 ---0 0000

---0 0000

---0 uuuu(3)

TOSH

2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu(3)

TOSL

2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu(3)

STKPTR

2331 2431 4331 4431 00-0 0000

uu-0 0000

uu-u uuuu(3)

PCLATU

2331 2431 4331 4431 ---0 0000

---0 0000

---u uuuu

PCLATH

2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu

PCL

2331 2431 4331 4431 0000 0000

0000 0000

PC + 2(2)

TBLPTRU 2331 2431 4331 4431 --00 0000

--00 0000

--uu uuuu

TBLPTRH 2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu

TBLPTRL 2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu

TABLAT

2331 2431 4331 4431 0000 0000

0000 0000

uuuu uuuu

PRODH

2331 2431 4331 4431 xxxx xxxx

uuuu uuuu

uuuu uuuu

PRODL

2331 2431 4331 4431 xxxx xxxx

uuuu uuuu

uuuu uuuu

INTCON

2331 2431 4331 4431 0000 000x

0000 000u

uuuu uuuu(1)

INTCON2 2331 2431 4331 4431 1111 -1-1

1111 -1-1

uuuu -u-u(1)

INTCON3 2331 2431 4331 4431 11-0 0-00

11-0 0-00

uu-u u-uu(1)

INDF0

2331 2431 4331 4431

N/A

N/A

N/A

POSTINC0 2331 2431 4331 4431

N/A

N/A

N/A

POSTDEC0 2331 2431 4331 4431

N/A

N/A

N/A

PREINC0 2331 2431 4331 4431

N/A

N/A

N/A

PLUSW0

2331 2431 4331 4431

N/A

N/A

N/A

FSR0H

2331 2431 4331 4431 ---- xxxx

---- uuuu

---- uuuu

FSR0L

2331 2431 4331 4431 xxxx xxxx

uuuu uuuu

uuuu uuuu

WREG

2331 2431 4331 4431 xxxx xxxx

uuuu uuuu

uuuu uuuu

INDF1

2331 2431 4331 4431

N/A

N/A

N/A

POSTINC1 2331 2431 4331 4431

N/A

N/A

N/A

POSTDEC1 2331 2431 4331 4431

N/A

N/A

N/A

PREINC1 2331 2431 4331 4431

N/A

N/A

N/A

PLUSW1

2331 2431 4331 4431

N/A

N/A

N/A

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

2:

3:

4:

5:

6:

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

See Table 5-2 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read â0â.

Bit 3 of PORTE and LATE are enabled if MCLR functionality is disabled. When not enabled as the PORTE

pin, they are disabled and read as â0â. The 28-pin devices do not have only RE3 implemented.

DS39616D-page 54

ï£ 2010 Microchip Technology Inc.

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