PIC18F2331_10 Datasheet, PDF (165/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 17-9:
TCY
QEI INPUTS WHEN SAMPLED BY THE FILTER (DIVIDE RATIO = 1:1)
QEA Pin
QEB Pin
TQEI = 16 TCY⁽¹⁾
QEA Input
QEB Input
TGD = 3 TCY
Note 1: The module design allows a quadrature frequency of up to FQEI = FCY/16.
FIGURE 17-10:
QEI MODULE RESET TIMING ON PERIOD MATCH
Forward
Reverse
QEA
QEB
Count (+/-) +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
POSCNT⁽¹⁾
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
MAXCNT
MAXCNT=1527
IC2QEIF
UP/DOWN
Note 2
Note 6
Note 2
Position
Counter Load
IC3DRIF
Q4⁽³⁾
Q1⁽⁴⁾
Q4⁽³⁾
Q1⁽⁵⁾
Q1⁽⁵⁾
Note 1:
2:
3:
4:
5:
6:
The POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge
of QEA and QEB input signals). Asynchronous external QEA and QEB inputs are synchronized to the TCY clock by
the input sampling FF in the noise filter (see Figure 17-14).
When POSCNT = MAXCNT, POSCNT is reset to ‘0’ on the next QEA rising edge. POSCNT is set to MAXCNT when
POSCNT = 0 (when decrementing), which occurs on the next QEA falling edge.
IC2QEIF is generated on the Q4 rising edge.
Position counter is loaded with ‘0’ (which is a rollover event in this case) on POSCNT = MAXCNT.
Position counter is loaded with MAXCNT value (1527h) on underflow.
IC2QEIF must be cleared in software.
 2010 Microchip Technology Inc.
DS39616D-page 165