PIC16LF1824T39A_12 Datasheet, PDF (85/418 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with XLP Technology

PIC16LF1824T39A
FIGURE 8-4:
INT PIN INTERRUPT TIMING
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKOUT ⁽³⁾
(4)
INT pin
INTF
(1)
(1)
(5)
Interrupt Latency ⁽²⁾
GIE
INSTRUCTION FLOW
PC
PC
Instruction
Fetched
Inst (PC)
PC + 1
Inst (PC + 1)
PC + 1
—
0004h
Inst (0004h)
0005h
Inst (0005h)
Instruction
Executed
Inst (PC – 1)
Inst (PC)
Dummy Cycle
Dummy Cycle
Inst (0004h)
Note 1: INTF flag is sampled here (every Q1).
2: Asynchronous interrupt latency = 3-5 TCY. Synchronous latency = 3-4 TCY, where TCY = instruction cycle time.
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
3: CLKOUT is not available in all oscillator modes.
4: For minimum width of INT pulse, refer to the AC specifications in Section 31.0 “Electrical Specifications”.
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
 2012 Microchip Technology Inc.
Preliminary
DS41657A-page 85