PIC16LF1824T39A_12 Datasheet, PDF (272/418 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with XLP Technology

PIC16LF1824T39A
25.6.13.1 Bus Collision During a Start
Condition
During a Start condition, a bus collision occurs if:
a) SDA or SCL are sampled low at the beginning of
the Start condition (Figure 25-33).
b) SCL is sampled low before SDA is asserted low
(Figure 25-34).
During a Start condition, both the SDA and the SCL
pins are monitored.
If the SDA pin is already low, or the SCL pin is already
low, then all of the following occur:
• the Start condition is aborted,
• the BCL1IF flag is set and
• the MSSP1 module is reset to its Idle state
(Figure 25-33).
The Start condition begins with the SDA and SCL pins
deasserted. When the SDA pin is sampled high, the
Baud Rate Generator is loaded and counts down. If the
SCL pin is sampled low while SDA is high, a bus colli-
sion occurs because it is assumed that another master
is attempting to drive a data ‘1’ during the Start
condition.
If the SDA pin is sampled low during this count, the
BRG is reset and the SDA line is asserted early
(Figure 25-35). If, however, a ‘1’ is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The Baud Rate Generator is then reloaded and
counts down to zero; if the SCL pin is sampled as ‘0’
during this time, a bus collision does not occur. At the
end of the BRG count, the SCL pin is asserted low.
Note:
The reason that bus collision is not a
factor during a Start condition is that no
two bus masters can assert a Start condi-
tion at the exact same time. Therefore,
one master will always assert SDA before
the other. This condition does not cause a
bus collision because the two masters
must be allowed to arbitrate the first
address following the Start condition. If the
address is the same, arbitration must be
allowed to continue into the data portion,
Repeated Start or Stop conditions.
FIGURE 25-33:
SDA
BUS COLLISION DURING START CONDITION (SDA ONLY)
SDA goes low before the SEN bit is set.
Set BCL1IF,
S bit and SSP1IF set because
SDA = 0, SCL = 1.
SCL
SEN
BCL1IF
S
Set SEN, enable Start
condition if SDA = 1, SCL = 1
SDA sampled low before
Start condition. Set BCL1IF.
S bit and SSP1IF set because
SDA = 0, SCL = 1.
SEN cleared automatically because of bus collision.
SSP1 module reset into Idle state.
SSP1IF and BCL1IF are
cleared by software
SSP1IF
SSP1IF and BCL1IF are
cleared by software
DS41657A-page 272
Preliminary
 2012 Microchip Technology Inc.