English
Language : 

PIC16LF1824T39A_12 Datasheet, PDF (277/418 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with XLP Technology
PIC16LF1824T39A
25.7 Baud Rate Generator
The MSSP1 module has a Baud Rate Generator avail-
able for clock generation in both I2C and SPI Master
modes. The Baud Rate Generator (BRG) reload value
is placed in the SSP1ADD register (Register 25-6).
When a write occurs to SSP1BUF, the Baud Rate
Generator will automatically begin counting down.
Once the given operation is complete, the internal clock
will automatically stop counting and the clock pin will
remain in its last state.
An internal signal “Reload” in Figure 25-40 triggers the
value from SSP1ADD to be loaded into the BRG
counter. This occurs twice for each oscillation of the
module clock line. The logic dictating when the reload
signal is asserted depends on the mode the MSSP1 is
being operated in.
Table 25-4 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSP1ADD.
EQUATION 25-1:
FCLOCK = ---S---S----P----x---A--F--D--O--D-S---C--+------1--------4----
FIGURE 25-40: BAUD RATE GENERATOR BLOCK DIAGRAM
SSP1M<3:0>
SSP1ADD<7:0>
SSP1M<3:0>
SCL
Reload
Control
Reload
SSP1CLK
BRG Down Counter
FOSC/2
Note:
Values of 0x00, 0x01 and 0x02 are not valid
for SSP1ADD when used as a Baud Rate
Generator for I2C. This is an implementation
limitation.
TABLE 25-4: MSSP1 CLOCK RATE W/BRG
FOSC
FCY
BRG Value
FCLOCK
(2 Rollovers of BRG)
32 MHz
8 MHz
13h
400 kHz(1)
32 MHz
8 MHz
19h
308 kHz
32 MHz
16 MHz
8 MHz
4 MHz
4Fh
100 kHz
09h
400 kHz(1)
16 MHz
4 MHz
0Ch
308 kHz
16 MHz
4 MHz
27h
100 kHz
4 MHz
1 MHz
09h
100 kHz
Note 1: The I2C interface does not conform to the 400 kHz I2C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
25.7.1 ALTERNATE PIN LOCATIONS
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
registers, APFCON0 and APFCON1. To determine
which pins can be moved and what their default
locations are upon a Reset, see Section 12.1 “Alter-
nate Pin Function” for more information.
 2012 Microchip Technology Inc.
Preliminary
DS41657A-page 277