PIC16LF1824T39A_12 Datasheet, PDF (32/418 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with XLP Technology

PIC16LF1824T39A
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 7
380h⁽¹⁾ INDF0
381h⁽¹⁾ INDF1
382h⁽¹⁾
383h⁽¹⁾
384h⁽¹⁾
385h⁽¹⁾
386h⁽¹⁾
387h⁽¹⁾
388h⁽¹⁾
389h⁽¹⁾
38Ah⁽¹⁾
38Bh⁽¹⁾
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
DC
INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
38Ch INLVLA
—
—
INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 --00 0100 --00 0100
38Eh INLVLC
—
—
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 --00 0000 --00 0000
38Fh
—
Unimplemented
—
—
390h
—
Unimplemented
—
—
391h IOCAP
—
—
IOCAP5
IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 --00 0000 --00 0000
392h IOCAN
—
—
IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 --00 0000 --00 0000
393h IOCAF
—
—
IOCAF5
IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 --00 0000 --00 0000
397h
—
Unimplemented
—
—
398h
—
Unimplemented
—
—
399h
—
Unimplemented
—
—
39Ah CLKRCON
CLKREN CLKROE CLKRSLR
CLKRDC<1:0>
CLKRDIV<2:0>
0011 0000 0011 0000
39Bh
—
Unimplemented
—
—
39Ch MDCON
MDEN
MDOE
MDSLR MDOPOL MDOUT
—
—
MDBIT 0010 ---0 0010 ---0
39Dh MDSRC
MDMSODIS
—
—
—
MDMS<3:0>
x--- xxxx u--- uuuu
39Eh MDCARL
MDCLODIS MDCLPOL MDCLSYNC
—
MDCL<3:0>
xxx- xxxx uuu- uuuu
39Fh MDCARH
MDCHODIS MDCHPOL MDCHSYNC
—
MDCH<3:0>
xxx- xxxx uuu- uuuu
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
DS41657A-page 32
Preliminary
 2012 Microchip Technology Inc.