PIC16LF1824T39A_12 Datasheet, PDF (365/418 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with XLP Technology

PIC16LF1824T39A
FIGURE 31-10: CAPTURE/COMPARE/PWM TIMINGS (CCP)
CCP
(Capture mode)
Note: Refer to Figure 31.5 for load conditions.
CC01
CC02
CC03
TABLE 31-7: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C  TA  +125°C
Param
No.
Sym.
Characteristic
Min.
Typ† Max. Units
Conditions
CC01* TccL CCP Input Low Time
No Prescaler 0.5TCY + 20 —
—
ns
With Prescaler
20
— — ns
CC02* TccH CCP Input High Time
No Prescaler 0.5TCY + 20 —
—
ns
With Prescaler
20
— — ns
CC03* TccP CCP Input Period
3TCY + 40 —
—
ns N = prescale value
N
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TABLE 31-8: PIC16LF1824T39A A/D CONVERTER (ADC) CHARACTERISTICS (NOTE 1, 2, 3)
Standard Operating Conditions (unless otherwise stated)
Operating temperature TA  25°C
Param
No.
Sym.
Characteristic
Min. Typ† Max. Units
Conditions
AD01 NR Resolution
—
—
10 bit
AD02 EIL Integral Error
—
—
±1.7 LSb VREF = 3.0V
AD03 EDL Differential Error
—
—
±1 LSb No missing codes
VREF = 3.0V
AD04 EOFF Offset Error
—
—
±2.5 LSb VREF = 3.0V
AD05 EGN Gain Error
—
—
±2.0 LSb VREF = 3.0V
AD06 VREF Reference Voltage (Note 4)
1.8
—
VDD V VREF = (VREF+ minus VREF-)
AD07 VAIN Full-Scale Range
VSS
—
VREF V
AD08 ZAIN Recommended Impedance of
Analog Voltage Source
—
—
10 k Can go higher if external 0.01F capacitor is
present on input pin.
*
†
Note 1:
2:
3:
4:
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Total Absolute Error includes integral, differential, offset and gain errors.
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
ADC VREF is from external VREF, VDD pin or FVR, whichever is selected as reference input.
ADC Reference Voltage (REF+) is the selected input, VREF+ pin, VDD pin or the FVR Buffer1. When the FVR is selected as
the reference input, the FVR Buffer1 output selection must be 2.048 or 4.096V (ADFVR<1:0> = 1x).
 2012 Microchip Technology Inc.
Preliminary
DS41657A-page 365