PIC18F6520-I Datasheet, PDF (57/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
TABLE 4-3: REGISTER FILE SUMMARY (CONTINUED)
File Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
LATJ⁽³⁾
LATH⁽³⁾
Read PORTJ Data Latch, Write PORTJ Data Latch
Read PORTH Data Latch, Write PORTH Data Latch
xxxx xxxx 35, 125
xxxx xxxx 35, 122
LATG
—
—
—
Read PORTG Data Latch, Write PORTG Data Latch
---x xxxx 35, 120
LATF
Read PORTF Data Latch, Write PORTF Data Latch
xxxx xxxx 35, 117
LATE
Read PORTE Data Latch, Write PORTE Data Latch
xxxx xxxx 35, 114
LATD
Read PORTD Data Latch, Write PORTD Data Latch
xxxx xxxx 35, 111
LATC
Read PORTC Data Latch, Write PORTC Data Latch
xxxx xxxx 35, 109
LATB
LATA
PORTJ⁽³⁾
PORTH⁽³⁾
Read PORTB Data Latch, Write PORTB Data Latch
—
LATA6⁽¹⁾ Read PORTA Data Latch, Write PORTA Data Latch⁽¹⁾
Read PORTJ pins, Write PORTJ Data Latch
Read PORTH pins, Write PORTH Data Latch
xxxx xxxx 35, 106
-xxx xxxx 35, 103
xxxx xxxx 36, 125
xxxx xxxx 36, 122
PORTG
—
—
—
Read PORTG pins, Write PORTG Data Latch
---x xxxx 36, 120
PORTF
Read PORTF pins, Write PORTF Data Latch
xxxx xxxx 36, 117
PORTE Read PORTE pins, Write PORTE Data Latch
xxxx xxxx 36, 114
PORTD Read PORTD pins, Write PORTD Data Latch
xxxx xxxx 36, 111
PORTC Read PORTC pins, Write PORTC Data Latch
xxxx xxxx 36, 109
PORTB
PORTA
Read PORTB pins, Write PORTB Data Latch
—
RA6⁽¹⁾ Read PORTA pins, Write PORTA Data Latch⁽¹⁾
xxxx xxxx 36, 106
-x0x 0000 36, 103
TMR4
Timer4 Register
0000 0000 36, 148
PR4
Timer4 Period Register
1111 1111 36, 148
T4CON
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000 36, 147
CCPR4H Capture/Compare/PWM Register 4 High Byte
xxxx xxxx 36, 151,
152
CCPR4L Capture/Compare/PWM Register 4 Low Byte
xxxx xxxx 36, 151,
152
CCP4CON
—
—
DC4B1
DC4B0 CCP4M3 CCP4M2 CCP4M1 CCP4M0 0000 0000 36, 149
CCPR5H Capture/Compare/PWM Register 5 High Byte
xxxx xxxx 36, 151,
152
CCPR5L Capture/Compare/PWM Register 5 Low Byte
xxxx xxxx 36, 151,
152
CCP5CON
—
—
DC5B1
DC5B0 CCP5M3 CCP5M2 CCP5M1 CCP5M0 0000 0000 36, 149
SPBRG2 USART2 Baud Rate Generator
0000 0000 36, 205
RCREG2 USART2 Receive Register
0000 0000 36, 206
TXREG2 USART2 Transmit Register
0000 0000 36, 204
TXSTA2
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D 0000 -010 36, 198
RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x 36, 199
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator modes only and read ‘0’ in all other oscillator
modes.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
These registers are unused on PIC18F6X20 devices; always maintain these clear.
 2004 Microchip Technology Inc.
DS39609B-page 55