PIC18F6520-I Datasheet, PDF (50/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
FIGURE 4-6:
DATA MEMORY MAP FOR PIC18FX520 DEVICES
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
•
•
•
= 0110
= 0111
= 1000
Data Memory Map
00h
Bank 0
FFh
00h
Bank 1
FFh
00h
Bank 2
FFh
00h
Bank 3
to
Bank 6
Access RAM
GPRs
GPRs
GPRs
GPRs
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
FFh
00h
Bank 7
FFh
GPRs
6FFh
700h
7FFh
800h
Access Bank
00h
Access RAM Low _5Fh
Access RAM High ^60h
(SFRs)
FFh
•
Bank 8
Unused,
•
to
Read as ‘0’
Bank 14
•
= 1110
= 1111
00h
Bank 15
FFh
When a = 1,
the BSR is used to specify the
RAM location that the instruction
uses.
Unused
SFRs
EFFh
F00h
F5Fh
F60h
FFFh
When a = 0,
the BSR is ignored and the
Access Bank is used.
The first 96 bytes are General
Purpose RAM (from Bank 0).
The second 160 bytes are
Special Function Registers
(from Bank 15).
DS39609B-page 48
 2004 Microchip Technology Inc.