PIC18F6520-I Datasheet, PDF (124/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
10.8 PORTH, LATH and TRISH
Registers
Note: PORTH is available only on PIC18F8X20
devices.
PORTH is an 8-bit wide, bidirectional I/O port. The cor-
responding data direction register is TRISH. Setting a
TRISH bit (= 1) will make the corresponding PORTH
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISH bit (= 0)
will make the corresponding PORTH pin an output (i.e.,
put the contents of the output latch on the selected pin).
Read-modify-write operations on the LATH register,
read and write the latched output value for PORTH.
Pins RH7:RH4 are multiplexed with analog inputs
AN15:AN12. Pins RH3:RH0 are multiplexed with the
system bus as the external memory interface; they are
the high-order address bits, A19:A16. By default, pins
RH7:RH4 are enabled as A/D inputs and pins
RH3:RH0 are enabled as the system address bus.
Register ADCON1 configures RH7:RH4 as I/O or A/D
inputs. Register MEMCON configures RH3:RH0 as I/O
or system bus pins.
Note 1: On Power-on Reset, PORTH pins
RH7:RH4 default to A/D inputs and read
as ‘0’.
2: On Power-on Reset, PORTH pins
RH3:RH0 default to system bus signals.
EXAMPLE 10-8:
CLRF PORTH
CLRF LATH
MOVLW
MOVWF
MOVLW
0Fh
ADCON1
0CFh
MOVWF TRISH
INITIALIZING PORTH
; Initialize PORTH by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
;
;
; Value used to
; initialize data
; direction
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
FIGURE 10-17:
RH3:RH0 PINS BLOCK
DIAGRAM IN I/O MODE
RD LATH
Data
Bus
D
Q
WR LATH
or
PORTH
CK
Data Latch
DQ
WR TRISH
CK
TRIS Latch
RD TRISH
I/O pin⁽¹⁾
Schmitt
Trigger
Input
Buffer
RD PORTH
Q
D
ENEN
Note 1: I/O pins have diode protection to VDD and VSS.
FIGURE 10-18:
RH7:RH4 PINS BLOCK
DIAGRAM IN I/O MODE
RD LATH
Data
Bus
D
Q
WR LATH
or
PORTH
CK
Data Latch
DQ
WR TRISH
CK
TRIS Latch
RD TRISH
I/O pin⁽¹⁾
Schmitt
Trigger
Input
Buffer
QD
RD PORTH
To A/D Converter
ENEN
Note 1: I/O pins have diode protection to VDD and VSS.
DS39609B-page 122
 2004 Microchip Technology Inc.