PIC18F6520-I Datasheet, PDF (280/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
DAW
Syntax:
Operands:
Operation:
Decimal Adjust W Register
[ label ] DAW
None
If [W<3:0> >9] or [DC = 1] then
(W<3:0>) + 6 → W<3:0>;
else
(W<3:0>) → W<3:0>;
If [W<7:4> >9] or [C = 1] then
(W<7:4>) + 6 → W<7:4>;
else
(W<7:4>) → W<7:4>;
Status Affected: C
Encoding:
0000 0000 0000 0111
Description:
DAW adjusts the eight-bit value in
W, resulting from the earlier
addition of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register W
Q3
Process
Data
Q4
Write
W
Example1:
DAW
Before Instruction
W
= 0xA5
C
=0
DC
=0
After Instruction
W
=
C
=
DC
=
0x05
1
0
Example 2:
Before Instruction
W
= 0xCE
C
=0
DC
=0
After Instruction
W
= 0x34
C
=1
DC
=0
DECF
Decrement f
Syntax:
[ label ] DECF f [,d [,a]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
Operation:
(f) – 1 → dest
Status Affected: C, DC, N, OV, Z
Encoding:
0000 01da ffff ffff
Description:
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in W. If ‘d’ is ‘1’,
the result is stored back in register
‘f’ (default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
DECF CNT,
Before Instruction
CNT
Z
= 0x01
=0
After Instruction
CNT
Z
= 0x00
=1
1, 0
DS39609B-page 278
 2004 Microchip Technology Inc.