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PIC18F6520-I Datasheet, PDF (41/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D
PIC18F6520/8520/6620/8620/6720/8720
4.0 MEMORY ORGANIZATION
There are three memory blocks in PIC18FXX20
devices. They are:
• Program Memory
• Data RAM
• Data EEPROM
Data and program memory use separate busses,
which allows for concurrent access of these blocks.
Additional detailed information for Flash program
memory and data EEPROM is provided in Section 5.0
“Flash Program Memory” and Section 7.0 “Data
EEPROM Memory”, respectively.
In addition to on-chip Flash, the PIC18F8X20 devices
are also capable of accessing external program mem-
ory through an external memory bus. Depending on the
selected operating mode (discussed in Section 4.1.1
“PIC18F8X20 Program Memory Modes”), the con-
trollers may access either internal or external program
memory exclusively, or both internal and external mem-
ory in selected blocks. Additional information on the
External Memory Interface is provided in Section 6.0
“External Memory Interface”.
4.1 Program Memory Organization
A 21-bit program counter is capable of addressing the
2-Mbyte program memory space. Accessing a location
between the physically implemented memory and the
2-Mbyte address will cause a read of all ‘0’s (a NOP
instruction).
Devices in the PIC18FXX20 family can be divided into
three groups, based on program memory size. The
PIC18FX520 devices (PIC18F6520 and PIC18F8520)
have 32 Kbytes of on-chip Flash memory, equivalent to
16,384 single-word instructions. The PIC18FX620
devices (PIC18F6620 and PIC18F8620) have
64 Kbytes of on-chip Flash memory, equivalent to
32,768 single-word instructions. Finally, the
PIC18FX720 devices (PIC18F6720 and PIC18F8720)
have 128 Kbytes of on-chip Flash memory, equivalent
to 65,536 single-word instructions.
For all devices, the Reset vector address is at 0000h
and the interrupt vector addresses are at 0008h and
0018h.
The program memory maps for all of the PIC18FXX20
devices are compared in Figure 4-1.
4.1.1
PIC18F8X20 PROGRAM MEMORY
MODES
PIC18F8X20 devices differ significantly from their
PIC18 predecessors in their utilization of program
memory. In addition to available on-chip Flash program
memory, these controllers can also address up to
2 Mbytes of external program memory through the
External Memory Interface. There are four distinct
operating modes available to the controllers:
• Microprocessor (MP)
• Microprocessor with Boot Block (MPBB)
• Extended Microcontroller (EMC)
• Microcontroller (MC)
The Program Memory mode is determined by setting
the two Least Significant bits of the CONFIG3L config-
uration byte, as shown in Register 4-1. (See also
Section 23.1 “Configuration Bits” for additional
details on the device configuration bits.)
The Program Memory modes operate as follows:
• The Microprocessor Mode permits access only
to external program memory; the contents of the
on-chip Flash memory are ignored. The 21-bit
program counter permits access to a 2-Mbyte
linear program memory space.
• The Microprocessor with Boot Block Mode
accesses on-chip Flash memory from addresses
000000h to 0007FFh for PIC18F8520 devices
and from 000000h to 0001FFh for PIC18F8620
and PIC18F8720 devices. Above this, external
program memory is accessed all the way up to
the 2-Mbyte limit. Program execution automati-
cally switches between the two memories, as
required.
• The Microcontroller Mode accesses only on-
chip Flash memory. Attempts to read above the
physical limit of the on-chip Flash (7FFFh for the
PIC18F8520, 0FFFFh for the PIC18F8620,
1FFFFh for the PIC18F8720) causes a read of all
‘0’s (a NOP instruction). The Microcontroller mode
is also the only operating mode available to
PIC18F6X20 devices.
• The Extended Microcontroller Mode allows
access to both internal and external program
memories as a single block. The device can
access its entire on-chip Flash memory; above
this, the device accesses external program
memory up to the 2-Mbyte program space limit.
As with Boot Block mode, execution automatically
switches between the two memories, as required.
In all modes, the microcontroller has complete access
to data RAM and EEPROM.
Figure 4-2 compares the memory maps of the different
Program Memory modes. The differences between on-
chip and external memory access limitations are more
fully explained in Table 4-1.
 2004 Microchip Technology Inc.
DS39609B-page 39