PIC18F6520-I Datasheet, PDF (20/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 ^Type
Buffer
Type
Description
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
3
5
I/O
ST
Digital I/O.
I/O
ST
Capture3 input/Compare3 output/
PWM3 output.
RG1/TX2/CK2
RG1
TX2
CK2
4
6
I/O
ST
Digital I/O.
O
—
USART 2 asynchronous transmit.
I/O
ST
USART 2 synchronous clock
(see RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
5
7
I/O
ST
Digital I/O.
I
ST
USART 2 asynchronous receive.
I/O
ST
USART 2 synchronous data
(see TX2/CK2).
RG3/CCP4
RG3
CCP4
6
8
I/O
ST
Digital I/O.
I/O
ST
Capture4 input/Compare4 output/
PWM4 output.
RG4/CCP5
RG4
CCP5
8
10
I/O
ST
Digital I/O.
I/O
ST
Capture5 input/Compare5 output/
PWM5 output.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DS39609B-page 18
 2004 Microchip Technology Inc.