PIC18F6520-I Datasheet, PDF (14/380 Pages) Micrel Semiconductor – 64/80-Pin High-Performance, 256 Kbit to 1 Mbit Enhanced Flash Microcontrollers with A/D

PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 ^Type
Buffer
Type
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
24
30
I/O
TTL
Digital I/O.
I Analog
Analog input 0.
RA1/AN1
RA1
AN1
23
29
I/O
TTL
Digital I/O.
I Analog
Analog input 1.
RA2/AN2/VREF-
RA2
AN2
VREF-
22
28
I/O
TTL
Digital I/O.
I Analog
Analog input 2.
I Analog
A/D reference voltage (Low) input.
RA3/AN3/VREF+
RA3
AN3
VREF+
21
27
I/O
TTL
Digital I/O.
I Analog
Analog input 3.
I Analog
A/D reference voltage (High) input.
RA4/T0CKI
RA4
T0CKI
28
34
I/O ST/OD
Digital I/O – Open-drain when
configured as output.
I
ST
Timer0 external clock input.
RA5/AN4/LVDIN
27
33
RA5
I/O
TTL
Digital I/O.
AN4
I Analog
Analog input 4.
LVDIN
I Analog
Low-Voltage Detect input.
RA6
See the OSC2/CLKO/RA6 pin.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DS39609B-page 12
 2004 Microchip Technology Inc.