PIC18F2682 Datasheet, PDF (470/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2682/2685/4682/4685
Capture (CCP1 Module) ................................................... 165
Associated Registers ............................................... 168
CAN Message Time-Stamp ..................................... 165
CCP1 Pin Configuration ........................................... 165
CCPR1H:CCPR1L Registers ................................... 165
Prescaler .................................................................. 165
Software Interrupt .................................................... 165
Timer1/Timer3 Mode Selection ................................ 165
Capture (ECCP1 Module) ................................................ 174
Capture/Compare/PWM (CCP1) ...................................... 163
Capture Mode. See Capture.
CCP1 Mode and Timer Resources .......................... 164
CCPR1H or ECCPR1H Register ............................. 164
CCPR1L or ECCPR1L Register ............................... 164
Compare Mode. See Compare.
Interaction Between CCP1 and ECCP1
for Timer Resources ........................................ 164
Module Configuration ............................................... 164
Clock Sources .................................................................... 28
Effects of Power-Managed Modes ............................. 31
Selecting the 31 kHz Source ...................................... 29
Selection Using OSCCON Register ........................... 29
CLRF ................................................................................ 379
CLRWDT .......................................................................... 379
Code Examples
16 x 16 Signed Multiply Routine .............................. 112
16 x 16 Unsigned Multiply Routine .......................... 112
8 x 8 Signed Multiply Routine .................................. 111
8 x 8 Unsigned Multiply Routine .............................. 111
Changing Between Capture Prescalers ................... 165
Changing to Configuration Mode ............................. 278
Computed GOTO Using an Offset Value ................... 64
Data EEPROM Read ............................................... 107
Data EEPROM Refresh Routine .............................. 108
Data EEPROM Write ............................................... 107
Erasing a Flash Program Memory Row ................... 100
Fast Register Stack .................................................... 64
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 88
Implementing a Real-Time Clock Using
a Timer1 Interrupt Service ............................... 155
Initializing PORTA .................................................... 129
Initializing PORTB .................................................... 132
Initializing PORTC .................................................... 135
Initializing PORTD .................................................... 138
Initializing PORTE .................................................... 141
Loading the SSPBUF (SSPSR) Register ................. 190
Reading a CAN Message ........................................ 294
Reading a Flash Program Memory Word .................. 99
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 128
Transmitting a CAN Message Using
Banked Method ................................................ 286
Transmitting a CAN Message
Using WIN Bits ................................................. 287
WIN and ICODE Bits Usage in Interrupt Service
Routine to Access TX/RX Buffers .................... 278
Writing to Flash Program Memory ................... 102–103
Code Protection ............................................................... 343
COMF ............................................................................... 380
Comparator ...................................................................... 257
Analog Input Connection Considerations ................ 261
Associated Registers ............................................... 261
Configuration ........................................................... 258
Effects of a Reset .................................................... 260
Interrupts ................................................................. 260
Operation ................................................................. 259
Operation During Sleep ........................................... 260
Outputs .................................................................... 259
Reference ................................................................ 259
External Signal ................................................ 259
Internal Signal .................................................. 259
Response Time ........................................................ 259
Comparator Specifications ............................................... 431
Comparator Voltage Reference ....................................... 263
Accuracy and Error .................................................. 264
Associated Registers ............................................... 265
Configuring .............................................................. 263
Connection Considerations ...................................... 264
Effects of a Reset .................................................... 264
Operation During Sleep ........................................... 264
Compare (CCP1 Module) ................................................ 167
Associated Registers ............................................... 168
CCP1 Pin Configuration ........................................... 167
CCPR1 Register ...................................................... 167
Software Interrupt .................................................... 167
Special Event Trigger .............................................. 167
Timer1/Timer3 Mode Selection ................................ 167
Compare (ECCP1 Module) .............................................. 174
Special Event Trigger .............................. 161, 174, 256
Configuration Bits ............................................................ 343
Configuration Mode ......................................................... 325
Configuration Register
Protection ................................................................ 362
Context Saving During Interrupts ..................................... 128
Conversion Considerations .............................................. 464
CPFSEQ .......................................................................... 380
CPFSGT .......................................................................... 381
CPFSLT ........................................................................... 381
Crystal Oscillator/Ceramic Resonators .............................. 23
Customer Change Notification Service ............................ 478
Customer Notification Service ......................................... 478
Customer Support ............................................................ 478
D
Data Addressing Modes .................................................... 88
Comparing Addressing Options with the
Extended Instruction Set Enabled ..................... 92
Direct ......................................................................... 88
Indexed Literal Offset ................................................ 91
Affected Instructions .......................................... 91
BSR ................................................................... 93
Mapping the Access Bank ................................. 93
Indirect ....................................................................... 88
Inherent and Literal .................................................... 88
Data EEPROM
Code Protection ....................................................... 362
DS39761B-page 468
Preliminary
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