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| PIC18F2682 Datasheet, PDF (173/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology | |||
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PIC18F2682/2685/4682/4685
TABLE 15-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
49
RCON
PIR1
PIE1
IPR1
IPEN
PSPIF(1)
PSPIE(1)
PSPIP(1)
SBOREN(2)
ADIF
ADIE
ADIP
â
RCIF
RCIE
RCIP
RI
TXIF
TXIE
TXIP
TO
PD
POR
BOR
50
SSPIF CCP1IF TMR2IF TMR1IF
52
SSPIE CCP1IE TMR2IE TMR1IE
52
SSPIP CCP1IP TMR2IP TMR1IP
52
TRISB
PORTB Data Direction Register
52
TRISC
PORTC Data Direction Register
52
TMR2
Timer2 Register
50
PR2
Timer2 Period Register
50
T2CON
â
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 50
CCPR1L
Capture/Compare/PWM Register 1 Low Byte
51
CCPR1H
Capture/Compare/PWM Register 1 High Byte
51
CCP1CON
â
â
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 51
ECCPR1L(1) Enhanced Capture/Compare/PWM Register 1 Low Byte
51
ECCPR1H(1) Enhanced Capture/Compare/PWM Register 1 High Byte
51
ECCP1CON(1) EPWM1M1 EPWM1M0 EDC1B1 EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0 51
Legend: â = unimplemented, read as â0â. Shaded cells are not used by PWM or Timer2.
Note 1: These bits or registers are available on PIC18F4682/4685 devices only.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as â0â.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 171
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