PIC18F2682 Datasheet, PDF (408/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2682/2685/4682/4685
25.2.2 EXTENDED INSTRUCTION SET
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Add Literal to FSR
ADDFSR f, k
0 ≤ k ≤ 63
f ∈ [ 0, 1, 2 ]
FSR(f) + k → FSR(f)
None
1110 1000 ffkk kkkk
The 6-bit literal ‘k’ is added to the
contents of the FSR specified by ‘f’.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to
FSR
Example:
ADDFSR 2, 23h
Before Instruction
FSR2 =
After Instruction
FSR2 =
03FFh
0422h
ADDULNK
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Add Literal to FSR2 and Return
ADDULNK k
0 ≤ k ≤ 63
FSR2 + k → FSR2,
PC = (TOS)
None
1110 1000 11kk kkkk
The 6-bit literal ‘k’ is added to the
contents of FSR2. A RETURN is then
executed by loading the PC with the
TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case
of the ADDFSR instruction, where f = 3
(binary ‘11’); it operates only on FSR2.
1
2
Q Cycle Activity:
Q1
Decode
No
Operation
Q2
Read
literal ‘k’
No
Operation
Q3
Process
Data
No
Operation
Q4
Write to
FSR
No
Operation
Example:
ADDULNK 23h
Before Instruction
FSR2 =
PC
=
TOS =
After Instruction
FSR2 =
PC
=
TOS =
03FFh
0100h
02AFh
0422h
02AFh
TOS – 1
Note: All PIC18 instructions may take an optional label argument preceding the instruction mnemonic for use in
symbolic addressing. If a label is used, the instruction syntax then becomes: {label} instruction argument(s).
DS39761B-page 406
Preliminary
© 2007 Microchip Technology Inc.