PIC18F2682 Datasheet, PDF (260/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2682/2685/4682/4685
20.1 Comparator Configuration
There are eight modes of operation for the compara-
tors, shown in Figure 20-1. Bits CM2:CM0 of the
CMCON register are used to select these modes. The
TRISA register controls the data direction of the com-
parator pins for each mode. If the Comparator mode is
changed, the comparator output level may not be valid
for the specified mode change delay shown in
Section 27.0 “Electrical Characteristics”.
Note:
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
FIGURE 20-1:
COMPARATOR I/O OPERATING MODES
Comparators Reset (POR Default Value)
CM2:CM0 = 000
Comparators Off
CM2:CM0 = 111
RD1/PSP1/C1IN- ^A
RD0/PSP0/C1IN+ ^A
VIN-
VIN+ ^C1
Off
(Read as ‘0’)
RD1/PSP1/C1IN- D
RD0/PSP0/C1IN+ ^D
VIN-
VIN+ ^C1
Off
(Read as ‘0’)
RD3/PSP3/C2IN- ^A
A
RD2/PSP2/C2IN+
VIN-
VIN+ ^C2
Off
(Read as ‘0’)
RD3/PSP3/C2IN- ^D
RD2/PSP2/C2IN+ ^D
VIN-
VIN+ ^C2
Off
(Read as ‘0’)
Two Independent Comparators
CM2:CM0 = 010
RD1/PSP1/C1IN- ^A
VIN-
RD0/PSP0/C1IN+ ^A
VIN+ ^C1
RD3/PSP3/C2IN- ^A
A
RD2/PSP2/C2IN+
VIN-
VIN+ ^C2
C1OUT
C2OUT
Two Independent Comparators with Outputs
CM2:CM0 = 011
RD1/PSP1/C1IN- ^A
VIN-
RD0/PSP0/C1IN+ ^A
VIN+ ^C1
C1OUT
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN- ^A
RD2/PSP2/C2IN+ ^A
RE2/CS/AN7/C2OUT*
VIN-
VIN+ ^C2
C2OUT
Two Common Reference Comparators
CM2:CM0 = 100
RD1/PSP1/C1IN- ^A
VIN-
RD0/PSP0/C1IN+ ^A
VIN+ ^C1
C1OUT
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
RD1/PSP1/C1IN- ^A
RD0/PSP0/C1IN+ ^A
VIN-
VIN+ ^C1
C1OUT
RD3/PSP3/C2IN- ^A
RD2/PSP2/C2IN+ ^D
VIN-
VIN+ ^C2
C2OUT
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN- ^A
RD2/PSP2/C2IN+ ^D
RE2/CS/AN7/C2OUT*
VIN-
VIN+ ^C2
C2OUT
One Independent Comparator with Output
CM2:CM0 = 001
RD1/PSP1/C1IN- ^A
RD0/PSP0/C1IN+ ^A
VIN-
VIN+ ^C1
RE1/WR/AN6/C1OUT*
RD3/PSP3/C2IN- ^D
RD2/PSP2/C2IN+ ^D
VIN-
VIN+ ^C2
C1OUT
Off
(Read as ‘0’)
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RD1/PSP1/ _A
C1IN-
RD0/PSP0/ A
C1IN+
CIS = 0
CIS = 1
VIN-
VIN+ ^C1
RD3/PSP3/ _A
C2IN-
RD2/PSP2/ A
C2IN+
CIS = 0
CIS = 1
VIN-
VIN+ ^C2
C1OUT
C2OUT
CVREF _{From VREF Module}
A = Analog Input, port reads zeros always
D = Digital Input
CIS (CMCON<3>) is the Comparator Input Switch
* Setting the TRISA<5:4> bits will disable the comparator outputs by configuring the pins as inputs.
DS39761B-page 258
Preliminary
© 2007 Microchip Technology Inc.