PIC18F2682 Datasheet, PDF (229/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2682/2685/4682/4685
18.0 ENHANCED UNIVERSAL
SYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of the
two serial I/O modules. (USART is also known as a
Serial Communications Interface or SCI.) The
EUSART can be configured as a full-duplex asynchro-
nous system that can communicate with peripheral
devices, such as CRT terminals and personal comput-
ers. It can also be configured as a half-duplex synchro-
nous system that can communicate with peripheral
devices, such as A/D or D/A integrated circuits, serial
EEPROMs and so on.
The EUSART module implements additional features,
including Auto-Baud Rate Detection and calibration,
automatic wake-up on Sync Break reception and 12-bit
Break character transmit. These features make it
ideally suited for use in Local Interconnect Network bus
(LIN bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full duplex) with:
- Auto-Wake-up on Character Reception
- Auto-Baud Calibration
- 12-Bit Break Character Transmission
• Synchronous – Master (half duplex) with
Selectable Clock Polarity
• Synchronous – Slave (half duplex) with
Selectable Clock Polarity
The pins of the Enhanced USART are multiplexed
with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT as an EUSART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for
Asynchronous and Synchronous Master modes,
or set (= 1) for Synchronous Slave mode
Note:
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register 18-1, Register 18-2 and Register 18-3,
respectively.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 227