PIC18FXX20 Datasheet, PDF (338/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
FIGURE 26-22: MASTER SSP I²C BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
START
Condition
Note: Refer to Figure 26-6 for load conditions.
STOP
Condition
TABLE 26-21: MASTER SSP I²C BUS START/STOP BITS REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
90
TSU:STA START condition 100 kHz mode 2(TOSC)(BRG + 1)
Setup time
400 kHz mode 2(TOSC)(BRG + 1)
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
91
THD:STA START condition 100 kHz mode 2(TOSC)(BRG + 1)
Hold time
400 kHz mode 2(TOSC)(BRG + 1)
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
92
TSU:STO STOP condition 100 kHz mode 2(TOSC)(BRG + 1)
Setup time
400 kHz mode 2(TOSC)(BRG + 1)
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
93
THD:STO STOP condition 100 kHz mode 2(TOSC)(BRG + 1)
Hold time
400 kHz mode 2(TOSC)(BRG + 1)
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
Max Units
Conditions
—
ns Only relevant for
—
Repeated START
condition
—
—
ns After this period, the
—
first clock pulse is
generated
—
—
ns
—
—
—
ns
—
—
FIGURE 26-23:
SCL
SDA
In
SDA
Out
MASTER SSP I²C BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 26-6 for load conditions.
102
92
110
DS39609A-page 336
Advance Information
 2003 Microchip Technology Inc.