PIC18FXX20 Datasheet, PDF (117/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
FIGURE 10-11: PORTE BLOCK DIAGRAM IN I/O MODE
Peripheral Out Select
Peripheral Data Out
RD LATE
0
VDD
P
1
Data Bus
WR LATE
or WR PORTE
DQ
CK Q
Data Latch
N
DQ
WR TRISE
CK Q
TRIS
Override
VSS
TRIS Latch
RD TRISE
Peripheral Enable
Q
RD PORTE
Peripheral Data In
Note 1: I/O pins have diode protection to VDD and VSS.
Schmitt
Trigger
D
EN
I/O pin⁽¹⁾
TRIS OVERRIDE
Pin Override
RE0
Yes
RE1
Yes
RE2
Yes
RE3
Yes
RE4
Yes
RE5
Yes
RE6
Yes
RE7
Yes
Peripheral
External Bus
External Bus
External Bus
External Bus
External Bus
External Bus
External Bus
External Bus
FIGURE 10-12: PORTE BLOCK DIAGRAM IN SYSTEM BUS MODE
RD PORTE
Q
D
ENEN
RD LATE
Data Bus
WR LATE
or PORTE
WR TRISE
DQ
CK
Data Latch
DQ
CK
TRIS Latch
Port ₀
Data ₁
RD TRISE
System Bus
Control
Bus Enable
Data/TRIS Out
Drive Bus
Instruction Register
Instruction Read
Note 1: I/O pins have protection diodes to VDD and VSS.
I/O pin⁽¹⁾
TTL
Input
Buffer
 2003 Microchip Technology Inc.
Advance Information
DS39609A-page 115