PIC18FXX20 Datasheet, PDF (118/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
TABLE 10-9: PORTE FUNCTIONS
Name
Bit# Buffer Type
Function
RE0/RD/AD8
bit0
RE1/WR/AD9
bit1
RE2/CS/AD10
bit2
RE3/AD11
bit3
RE4/AD12
bit4
RE5/AD13
bit5
RE6/AD14
bit6
RE7/CCP2/AD15 bit7
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
ST/TTL⁽¹⁾
Input/output port pin, Read control for parallel slave port, or
address/data bit 8
For RD (PSP Control mode):
1 = Not a read operation
0 = Read operation, reads PORTD register (if chip selected)
Input/output port pin, Write control for parallel slave port, or
address/data bit 9
For WR (PSP Control mode):
1 = Not a write operation
0 = Write operation, writes PORTD register (if chip selected)
Input/output port pin, Chip Select control for parallel slave port, or
address/data bit 10
For CS (PSP Control mode):
1 = Device is not selected
0 = Device is selected
Input/output port pin or address/data bit 11.
Input/output port pin or address/data bit 12.
Input/output port pin or address/data bit 13.
Input/output port pin or address/data bit 14.
Input/output port pin, Capture2 input/ Compare2 output/PWM output
(PIC18F8X20 devices in Microcontroller mode only), or
address/data bit 15.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O or CCP mode, and TTL buffers when in System Bus or PSP
Control mode.
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7 Bit 6 Bit 5
Bit 4
Bit 3 Bit 2 Bit 1
TRISE
PORTE Data Direction Control Register
PORTE
Read PORTE pin/Write PORTE Data Latch
LATE
Read PORTE Data Latch/Write PORTE Data Latch
MEMCON EBDIS — WAIT1 WAIT0
—
— WM1
PSPCON
IBF OBF IBOV PSPMODE —
—
—
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTE.
Bit 0
WM0
—
Value on:
POR, BOR
1111 1111
xxxx xxxx
xxxx xxxx
0-00 --00
0000 ----
Value on
all other
RESETS
1111 1111
uuuu uuuu
uuuu uuuu
0000 --00
0000 ----
DS39609A-page 116
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 2003 Microchip Technology Inc.