PIC18FXX20 Datasheet, PDF (197/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
17.4.17.3 Bus Collision During a STOP
Condition
Bus collision occurs during a STOP condition if:
a) After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
b) After the SCL pin is de-asserted, SCL is
sampled low before SDA goes high.
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to ‘0’. After the BRG times out, SDA
is sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0' (Figure 17-31). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master
attempting to drive a data '0' (Figure 17-32).
FIGURE 17-31:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
TBRG
TBRG
TBRG
SDA
SDA sampled
low after TBRG,
set BCLIF
SDA asserted low
SCL
PEN
BCLIF
P
'0'
SSPIF
'0'
FIGURE 17-32:
SDA
SCL
PEN
BCLIF
P
SSPIF
BUS COLLISION DURING A STOP CONDITION (CASE 2)
TBRG
TBRG
TBRG
Assert SDA
SCL goes low before SDA goes high,
set BCLIF
'0'
'0'
 2003 Microchip Technology Inc.
Advance Information
DS39609A-page 195