PIC18FXX20 Datasheet, PDF (103/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
9.5 RCON Register
The RCON register contains the IPEN bit, which is
used to enable prioritized interrupts. The functions of
the other bits in this register are discussed in more
detail in Section 4.14.
REGISTER 9-13: RCON REGISTER
R/W-0
U-0
IPEN
—
bit 7
U-0
R/W-1
R-1
—
RI
TO
R-1
R/W-0 R/W-0
PD
POR
BOR
bit 0
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16 Compatibility mode)
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-4
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-4
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-4
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-4
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-4
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2003 Microchip Technology Inc.
Advance Information
DS39609A-page 101