PIC18FXX20 Datasheet, PDF (325/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
FIGURE 26-8:
OSC1
CLKO AND I/O TIMING
Q4
Q1
10
CLKO
13
14
I/O Pin
(Input)
17
I/O Pin
(Output)
Old Value
Note:
20, 21
Refer to Figure 26-6 for load conditions.
Q2
19
18
15
New Value
Q3
11
12
16
TABLE 26-8: CLKO AND I/O TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Typ
Max
Units
10
TosH2ckL OSC1 ↑ to CLKO ↓
—
75
200
ns
11
TosH2ckH OSC1 ↑ to CLKO ↑
—
75
200
ns
12
TckR
CLKO rise time
—
35
100
ns
13
TckF
CLKO fall time
—
35
100
ns
14
TckL2ioV CLKO ↓ to Port out valid
—
— 0.5 TCY + 20 ns
15
TioV2ckH Port in valid before CLKO ↑
0.25 TCY + 25 —
—
ns
16
TckH2ioI Port in hold after CLKO ↑
0
—
—
ns
17
TosH2ioV OSC1 ↑ (Q1 cycle) to Port out valid
—
50
150
ns
18
TosH2ioI OSC1 ↑ (Q2 cycle) to
PIC18FXX20
100
—
—
ns
18A
Port input invalid
PIC18LFXX20
200
—
—
ns
(I/O in hold time)
19
TioV2osH Port input valid to OSC1 ↑
(I/O in setup time)
0
—
—
ns
20
TioR
Port output rise time
PIC18FXX20
—
10
25
ns
20A
PIC18LFXX20
—
—
60
ns
21
TioF
Port output fall time
PIC18FXX20
—
10
25
ns
21A
PIC18LFXX20
—
—
60
ns
22††
TINP
INT pin high or low time
TCY
—
—
ns
23††
TRBP
RB7:RB4 change INT high or low time
TCY
—
—
ns
24††
TRCP
RC7:RC4 change INT high or low time
20
ns
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC.
Conditions
(1)
(1)
(1)
(1)
(1)
(1)
(1)
 2003 Microchip Technology Inc.
Advance Information
DS39609A-page 323