PIC18FXX20 Datasheet, PDF (21/366 Pages) Microchip Technology – 64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D

PIC18FXX20
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 ^Type
Buffer
Type
Description
PORTH is a bi-directional I/O port⁽⁵⁾.
RH0/A16
RH0
A16
—
79
I/O
ST
Digital I/O.
O
TTL
External memory address 16.
RH1/A17
RH1
A17
—
80
I/O
ST
Digital I/O.
O
TTL
External memory address 17.
RH2/A18
RH2
A18
—
1
I/O
ST
Digital I/O.
O
TTL
External memory address 18.
RH3/A19
RH3
A19
—
2
I/O
ST
Digital I/O.
O
TTL
External memory address 19.
RH4/AN12
RH4
AN12
—
22
I/O
ST
Digital I/O.
I
Analog
Analog input 12.
RH5/AN13
RH5
AN13
—
21
I/O
ST
Digital I/O.
I
Analog
Analog input 13.
RH6/AN14
RH6
AN14
—
20
I/O
ST
Digital I/O.
I
Analog
Analog input 14.
RH7/AN15
RH7
AN15
—
19
I/O
ST
Digital I/O.
I
Analog
Analog input 15.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all Operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper
operation of the part in User or ICSP modes. See parameter D001A for details.
 2003 Microchip Technology Inc.
Advance Information
DS39609A-page 19