PIC32MX575F256H-80I Datasheet, PDF (143/236 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-Bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
23.0 CONTROLLER AREA
NETWORK (CAN)
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 34. “Controller
Area Network (CAN)” in the “PIC32MX
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
The Controller Area Network (CAN) module supports
the following key features:
• Standards Compliance:
- Full CAN 2.0B compliance
- Programmable bit rate up to 1 Mbps
• Message Reception and Transmission:
- 32 message FIFOs
- Each FIFO can have up to 32 messages for a
total of 1024 messages
- FIFO can be a transmit message FIFO or a
receive message FIFO
- User-defined priority levels for message
FIFOs used for transmission
- 32 acceptance filters for message filtering
- Four acceptance filter mask registers for
message filtering
- Automatic response to remote transmit request
- DeviceNet™ addressing support
• Additional Features:
- Loopback, Listen All Messages and Listen
Only modes for self-test, system diagnostics
and bus monitoring
- Low-power operating modes
- CAN module is a bus master on the
PIC32MX system bus
- Use of DMA is not required
- Dedicated time-stamp timer
- Dedicated DMA channels
- Data Only Message Reception mode
Figure 23-1 illustrates the general structure of the CAN
module.
FIGURE 23-1:
PIC32MX CAN MODULE BLOCK DIAGRAM
CxTX
CxRX
32 Filters
4 Masks
CAN Module
CPU
System Bus
Message Buffer 31
System RAM
Message Buffer 31
Message Buffer 31
Message
Buffer Size
2 or 4 Words
Message Buffer 1
Message Buffer 0
FIFO0
Message Buffer 1
Message Buffer 0
FIFO1
Message Buffer 1
Message Buffer 0
FIFO31
CAN Message FIFO (up to 32 FIFOs)
 2010 Microchip Technology Inc.
Preliminary
DS61156C-page 143