PIC32MX575F256H-80I Datasheet, PDF (125/236 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-Bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
14.0 TIMER2/3, TIMER4/5
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105) of the “PIC32MX Family
Reference Manual”, which is available
from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to
4.0 “Memory Organization” in this data
sheet for device-specific register and bit
information.
This family of PIC32MX devices features four
synchronous 16-bit timers (default) that can operate as
a free-running interval timer for various timing applica-
tions and counting external events. The following
modes are supported:
• Synchronous Internal 16-Bit Timer
• Synchronous Internal 16-Bit Gated Timer
• Synchronous External 16-Bit Timer
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous Internal 32-Bit Timer
• Synchronous Internal 32-Bit Gated Timer
• Synchronous External 32-Bit Timer
Note:
In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to repre-
sent Timer2 through 5 in 16-bit modes. In
32-bit modes, ‘x’ represents Timer2 or 4;
‘y’ represents Timer3 or 5.
14.1 Additional Supported Features
• Selectable Clock Prescaler
• Timers Operational during CPU Idle
• Time Base for Input Capture and Output Compare
modules (Timer2 and Timer3 only)
• ADC Event Trigger (Timer3 only)
• Fast Bit Manipulation using CLR, SET and INV
registers
FIGURE 14-1:
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
TMRx
ADC Event
Trigger⁽¹⁾
Comparator x 16
Equal
PRx
Reset
TxIF
0
Event Flag
1
TGATE (TxCON<7>)
QD
Q
TxCK⁽²⁾
Gate
Sync
PBCLK
Note 1: ADC event trigger is available on Timer3 only.
2: TxCK pins are not available on 64-pin devices.
Sync
TGATE (TxCON<7>)
TCS (TxCON<1>)
ON (TxCON<15>)
x1
Prescaler
1, 2, 4, 8, 16,
10
32, 64, 256
00
3
TCKPS (TxCON<6:4>)
 2010 Microchip Technology Inc.
Preliminary
DS61156C-page 125