PIC32MX575F256H-80I Datasheet, PDF (133/236 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-Bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
18.0 INTER-INTEGRATED CIRCUIT
(I²C™)
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 24. “Inter-
Integrated Circuit” (DS61116) in the
“PIC32MX Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
The I²C module provides complete hardware support
for both Slave and Multi-Master modes of the I²C serial
communication standard. Figure 18-1 shows the I²C
module block diagram.
Each I²C module has a 2-pin interface: the SCLx pin is
clock and the SDAx pin is data.
Each I²C module offers the following key features:
• I²C Interface Supporting both Master and Slave
Operation
• I²C Slave mode Supports 7 and 10-Bit Address
• I²C Master mode Supports 7 and 10-Bit Address
• I²C Port allows Bidirectional Transfers between
Master and Slaves
• Serial Clock Synchronization for I²C Port can be
used as a Handshake Mechanism to Suspend
and Resume Serial Transfer (SCLREL control)
• I²C Supports Multi-Master Operation; Detects Bus
Collision and Arbitrates Accordingly
• Provides Support for Address Bit Masking
 2010 Microchip Technology Inc.
Preliminary
DS61156C-page 133