PIC32MX575F256H-80I Datasheet, PDF (113/236 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-Bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
8.0 OSCILLATOR
CONFIGURATION
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 6. “Oscillator
Configuration” (DS61112) in the
“PIC32MX Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
The PIC32MX5XX/6XX/7XX oscillator system has the
following modules and features:
• A Total of Four External and Internal Oscillator
Options as Clock Sources
• On-Chip PLL with User-Selectable Input Divider,
Multiplier and Output Divider to Boost Operating
Frequency on Select Internal and External
Oscillator Sources
• On-Chip User-Selectable Divisor Postscaler on
Select Oscillator Sources
• Software-Controllable Switching Between
Various Clock Sources
• A Fail-Safe Clock Monitor (FSCM) that Detects
Clock Failure and Permits Safe Application
Recovery or Shutdown
• Dedicated On-Chip PLL for USB Peripheral
FIGURE 8-1:
PIC32MX5XX/6XX/7XX FAMILY CLOCK DIAGRAM
USB PLL
C1⁽³⁾
Primary Oscillator
OSC1 ^(POSC)
XTAL
RF⁽²⁾
To Internal
Logic
Enable
RS⁽¹⁾
C2⁽³⁾ _OSC2(4)
div 2
ADC
UFIN
div x
PLL x24
UFIN 4 MHz
FUPLLDIV<2:0>
div 2
USB Clock (48 MHz)
UFRCEN
FUPLLEN
XT, HS, EC
4 MHz FIN 5 MHz
XTPLL, HSPLL,
FIN
ECPLL, FRCPLL
div x
PLL
div y
Postscaler ^Peripherals
div x
PBCLK
PLL Input Divider
FPLLIDIV<2:0>
PLL Output Divider
PLLODIV<2:0>
PBDIV<2:0>
FRC
Oscillator
8 MHz typical
COSC<2:0>
PLL Multiplier
PLLMULT<2:0>
FRC
CPU and Select Peripherals
TUN<5:0>
Postscaler
div 16
FRC/16
FRCDIV
LPRC
Oscillator
FRCDIV<2:0>
31.25 kHz typical
Secondary Oscillator (SOSC)
SOSCO
32.768 kHz
SOSCEN and FSOSCEN
SOSCI
Notes: 1. A series resistor, RS, may be required for AT strip cut crystals.
2. The internal feedback resistor, RF, is typically in the range of 2 to 10 M
3. Refer to Section 6. “Oscillator Configuration” (DS61112) in the
“PIC32MX Family Reference Manual” for help in determining the best
oscillator components.
4. PBCLK out is available on the OSC2 pin in certain clock modes.
LPRC
SOSC
Clock Control Logic
Fail-Safe
Clock
Monitor
FSCM INT
FSCM Event
NOSC<2:0>
COSC<2:0>
FSCMEN<1:0>
OSWEN
WDT, PWRT
Timer1, RTCC
 2010 Microchip Technology Inc.
Preliminary
DS61156C-page 113