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PIC32MX575F256H-80I Datasheet, PDF (131/236 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-Bit Flash Microcontrollers
PIC32MX5XX/6XX/7XX
17.0 SERIAL PERIPHERAL
INTERFACE (SPI)
Note 1: This data sheet summarizes the features
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
Section 23. “Serial Peripheral Interface
(SPI)” (DS61106) in the “PIC32MX
Family Reference Manual”, which is avail-
able from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontroller devices. These peripheral
devices may be Serial EEPROMs, Shift registers, dis-
play drivers, A/D Converters, etc. The PIC32MX SPI
module is compatible with Motorola® SPI and SIOP
interfaces.
Following are some of the key features of this module:
• Master and Slave modes Support
• Four Different Clock Formats
• Enhanced Framed SPI Protocol Support
• User-Configurable 8-Bit, 16-Bit and 32-Bit Data
Width
• Separate SPI FIFO Buffers for Receive and
Transmit
- FIFO buffers act as 4/8/16-level deep FIFOs
based on 32/16/8-bit data width
• Programmable Interrupt Event on Every 8-Bit,
16-Bit and 32-Bit Data Transfer
• Operation during CPU Sleep and Idle mode
• Fast Bit Manipulation using CLR, SET and INV
Registers
FIGURE 17-1:
SPI MODULE BLOCK DIAGRAM
Internal
Data Bus
Read
SPIxBUF
Write
SPIxRXB FIFO SPIxTXB FIFO
FIFOs Share Address SPIxBUF
Transmit
SDIx
Receive
SPIxSR
bit 0
SDOx
SSx/FSYNC
Slave Select
and Frame
Sync Control
SCKx
Shift
Control
Clock
Control
Edge
Select
Baud Rate
Generator
PBCLK
Enable Master Clock
Note: Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
 2010 Microchip Technology Inc.
Preliminary
DS61156C-page 131