1EDI2001AS_15 Datasheet, PDF (96/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2001AS
Register Description
Secondary Second Status Register
This register contains information on the status of the device.
SSTAT2
Secondary Second Status Register
Offset
12_H
Wakeup Value
n.a.
Reset Value
xxxx_H
15
Res
rh
7
OCPC2
rh
14
DACLPL
rh
6
OCPC1
rh
13
GC2
rh
5
OSDL
rh
12
GC1
rh
4
DSATC
rh
11
10
OVLO3M UVLO3M
rh
rh
3
2
0
r
9
OVLO2M
rh
1
LMI
rh
8
UVLO2M
rh
0
P
rh
Field
Res
DACLPL
GC2
GC1
OVLO3M
UVLO3M
Bits
Type Description
15
rh
Reserved
This bit is reserved.
14
rh
DACLP Level
This bit indicates the level read at pin DACLP.
0_B: DACLP level is Low.
1_B: DACLP level is High.
13
rh
Gate Second Comparator Status
This bit shows the output of the second comparator of the
Gate Monitoring function.
0_B: GATE voltage is below V_GATE2.
1_B: GATE voltage is above V_GATE2.
12
rh
Gate First Comparator Status
This bit indicates the output of the first comparator of the
Gate Monitoring function.
0_B: GATE voltage is below V_GATE1.
1_B: GATE voltage is above V_GATE1.
11
rh
OVLO3 Comparator Status
This bit indicates the result of the OVLO3 monitoring
function.
0_B: No failure condition is detected.
1_B: A failure condition is detected.
10
rh
UVLO3 Monitoring Result
This bit indicates the result of the UVLO3 monitoring
function.
0_B: No failure condition is detected.
1_B: A failure condition is detected.
Datasheet
96
Hardware Description
Rev. 3.1, 2015-07-30