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| 1EDI2001AS_15 Datasheet, PDF (88/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step | |||
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EiceDRIVER⢠SIL
1EDI2001AS
Register Description
Primary Supervision Function Control Register
This register is used to trigger the verification functions on the primary side.
PSCR
Primary Supervision Function Control Register
Offset
08H
Wakeup Value
n.a.
Reset Value
0001H
15
7
0
r
0
r
4
3
2
VFS1
rwh
8
1
0
LMI
P
rh
rh
Field
0
VFS1
LMI
P
Bits
Type Description
15:4
r
Reserved
Read as 0B.
3:2
rwh
Primary Verification Function Selection
This bit field is used to activate the primary verification
functions.
00B: No function activated.
01B: Reserved.
10B: Primary Clock Supervision active.
11B: Reserved.
Note: The selection defined by this bit field is only
effective when the device enters Mode OPM5. This
bit field is automatically cleared when entering
OPM1.
1
rh
Last Message Invalid Notification
This bit indicates if the last received SPI Message was
correctly processed by the device.
0B: Previous Message was processed correctly.
1B: Previous Message was discarded.
0
rh
Parity Bit
Odd Parity Bit.
Datasheet
88
Hardware Description
Rev. 3.1, 2015-07-30
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