English
Language : 

1EDI2001AS_15 Datasheet, PDF (18/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step
EiceDRIVER™ SIL
1EDI2001AS
Functional Description
OSD
Output Stage Disable input. A High Level on this pin tristates the output stage. An internal weak pull-down resistor
to VGND2 drives this input to Low state in case the pin is floating.
DACLP
Output pin used to disable the active clamping function of the booster.
DEBUG
Debug input pin. This pin is latched at power-up. When a High level is detected on this pin, the device enters a
special mode where it can be operated without SPI interface. This feature is for development purpose only. This
pin should normally be tied to VGND2. An internal weak pull-down resistor to VGND2 drives this input to Low state in
case the pin is floating.
IREF2
Reference input of the secondary chip. This pin shall be connected to VGND2 via an external resistor.
VREG
Reference Output voltage. This pin shall be connected to an external capacitance to VGND2.
NUV2
VCC2 not valid notification signal (Open Drain). This signal drives a low level when VCC2 is not valid or when the
internal 5V digital supply is not valid. When both supplies are valid, this pin is in high impedance state. This pin
shall be connected externally to a 5V reference with a pull-up resistance.
2.2.2.3 Pull Devices
Some of the pins are connected internally to pull-up or pull-down devices. This is summarized in Table 2-2.
Table 2-2
Signal
INP
INSTP
EN
SCLK
SDI
NCS
DESAT
OSD
OCP
DEBUG
Internal pull devices
Device
Weak pull down to VREF0
Weak pull down to VREF0
Weak pull down to VREF0
Weak pull up to VCC1
Weak pull up to VCC1
Weak pull up to VCC1
Weak pull up to VCC2
Weak pull down to VGND2
Weak pull up to 5V internal reference
Weak pull down to VGND2
Datasheet
18
Hardware Description
Rev. 3.1, 2015-07-30