English
Language : 

1EDI2001AS_15 Datasheet, PDF (41/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step
a)
tPULSE < tTTOFF + 2. tSSOSC
Input Pulse
tPDON
tTTOFF
2. tSSOSC
tTTOFF
Output Pulse
EiceDRIVER™ SIL
1EDI2001AS
Functional Description
TTOFF Plateau
b)
tPULSE > tTTOFF + 2. tSSOSC
Input Pulse
tPDON
tTTOFF
tPDOFF
tTTOFF
Output Pulse
tPULSE
Figure 2-13 TTOFF: Principle of Operation
Pulse Suppressor
In order to increase the device’s robustness against external disturbances, a pulse suppressor can be enabled by
setting bit SCFG.PSEN. Register SRTTOF shall also programmed with a value higher than 2H. When a PWM turn-
on sequence occurs, the activation of the output stage is delayed by the programmed TTOFF number of cycles,
as for a normal TTOFF sequence. However, the PWM command received by the secondary chip signal is
internally sampled at every SSOSC cycle before the actual turn-on command is executed by the output stage. If
at least one of the sampling point does not detect a high level, the turn-on sequence is aborted and the device is
not switched on.
In case a valid PWM ON command is detected by the secondary side after the decision point the previous
sequence has been aborted, a new turn-on sequence is initiated.
Datasheet
41
Hardware Description
Rev. 3.1, 2015-07-30