1EDI2001AS_15 Datasheet, PDF (47/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2001AS
Functional Description
Pin EN should be driven actively by the external circuit. In case this pin is floating, an internal weak pull-down
resistor ensures that the signal is low.
Note: It should be noted that even if the signal at pin EN is valid, the device can still be in disabled state. This may
happen for example if another error is being detected
A valid EN signal is defined as a digital High level. When EN is at Low level, the signal is considered as not valid
and the device is in Disabled State. In case of a High-to-Low transition, an Event Class A is generated.
An Invalid to Valid transition of signal EN deactivates signals NFLTA and NFLTB (when the device is in OPM3 or
OPM5 only).
The levels read by the device at pin EN is given by bits PPIN.ENL. The validity status of EN signal is given by bit
PSTAT2.ENVAL.
2.4.9 Reset Events
A reset event sets the device and its internal logic in the default configuration. All user-defined settings are
overwritten with the default values. The list of reset events and their effect is summarized in Table 2-13.
Table 2-13 Reset Events Summary
Reset Event
Primary
Secondary
NRST/RDY Input Reset
signal active (driven
externally)
Soft Reset
UVLO1 Event
Reset
Soft Reset
OSC1 not starting Reset
at power-up
Soft Reset
Notification
(primary)
Notification
(secondary)
• NRST/RDY Low (during • Bit SER.CER2 set (in
event).
case of lifesign lost).
• Bit PER.RSTE1 and
• Output Stage issues a
PER.RST1 set.
PWM OFF command.
• Bit PER.CER1 is not set. • OSD pin functionality
• Event Class B (NFLTB
operational.
activated) at the end of the
reset event.
• NRST/RDY Low (driven • Bit SER.CER2 set (in
by device during event).
case of lifesign lost).
• Bit PER.RST1 set (once • Output Stage issues a
V_CC1 valid again).
PWM OFF command.
• Bit PER.CER1 is not set. • OSD pin functionality
• Event Class B (NFLTB
operational.
activated) at the end of the
reset event.
• NRST/RDY Low (driven • Bit SER.CER2 set (in
by device during event).
case of lifesign lost).
• Bit PER.RST1 set (once • Output Stage issues a
OSC1 valid again).
PWM OFF command.
• Bit PER.CER1 is not set. • OSD pin functionality
• Event Class B (NFLTB
operational.
activated) at the end of the
reset event.
Datasheet
47
Hardware Description
Rev. 3.1, 2015-07-30