1EDI2001AS_15 Datasheet, PDF (24/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2001AS
Functional Description
2.4.4.2 General Operation
The SPI interface of the 1EDI2001AS supports full duplex operation. The interface relies on four communication
signals:
• NCS: (Not) Chip Select.
• SCLK: Serial Clock.
• SDI: Serial Data In.
• SDO: Serial Data Out.
The SPI interface of the 1EDI2001AS supports slave operation only. An SPI master (typically, the main
microcontroller) is connected to one or several 1EDI2001AS devices, forming an SPI bus. Several bus topologies
are supported.
A regular SPI bus topology can be used where each of the slaves is controlled by an individual chip select signal
(Figure 2-6). In this case, the number of slaves on the bus is only limited by the application’s constraints.
SCLK
Master _SDO
SDI
NCS1
NCS2
NCSn
SCLK
SDI ^{Slave 1}
SDO
NCS
SCLK
SDI ^{Slave 2}
SDO
NCS
SCLK
SDI ^{Slave n}
SDO
NCS
Figure 2-6 SPI Regular Bus Topology
In order to simplify the layout of the PCB and to reduce the number of pins used on the microcontroller’s side, a
daisy chain topology can also be used. The chain’s depth is not limited by the 1EDI2001AS itself. A possible
topology is shown Figure 2-7.
Datasheet
24
Hardware Description
Rev. 3.1, 2015-07-30