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1EDI2001AS_15 Datasheet, PDF (38/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step
EiceDRIVER™ SIL
1EDI2001AS
Functional Description
2.4.5.6 Debug Mode
The DEBUG pin gives the possibility to operate the device in the so-called Debug Mode. The goal of the Debug
Mode is to operate the device without SPI interface. This mode should be used for development purpose only and
is not intended to be used in final applications.
At VCC2 power-on, the level at pin DEBUG is latched. In case a High level is detected, the device enters the Debug
Mode. Bit SSTAT.DBG is then set.
In Debug Mode, the regular operation of the internal state machine is modified, so that the device can only enter
OPM3 or OPM4. As a result Modes OPM0, OPM1, OPM2, OPM5 and OPM6 are completely bypassed. In case
of a Reset event, the device goes to OPM3 (instead of OPM0). Besides, in Debug Mode, events leading normally
to an Event Class B are replaced an Event Class A, resulting in the activation of signal NFLTA. Event Class B are
therefore not generated by the device in Debug Mode (and signal NFLTB shall not be used).
It should be noted that the configuration of the device in Debug Mode corresponds to the default settings and can
not be changed (for example, the DESAT function is completely deactivated).
In Debug Mode, the operation of the device is otherwise similar to regular operation. It means in particular that the
signal EN has to be managed properly: when the device is in OPM3, a Low to High level transition has to be
applied to the device in order to enter OPM4 (Active Mode).
Note: Once it has been latched at power-on, the level on the pin DEBUG has no impact on the device until the next
power-on event on the secondary side.
Datasheet
38
Hardware Description
Rev. 3.1, 2015-07-30