1EDI2001AS_15 Datasheet, PDF (15/135 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2001AS
Functional Description
Table 2-1 Pin Configuration (cont’d)
Pin
Symbol
I/O
Number
14
DACLP
Output
15
OSD
Input
16
Reserved
Reserved
17
NUV2
Output
19, 28, 36 GND1
Ground
20
Reserved
Reserved
21
SCLK
Input
22
SDI
Input
23
NCS
Input
24
SDO
Output
25
Reserved
Reserved
26
NFLTB
Output
27
NFLTA
Output
29
NRST/RDY
Input/Output
30
EN
Input
31
REF0
Ref. Ground
32
INP
Input
33
INSTP
Input
34
VCC1
Supply Input
35
IREF1
Input
1) All VEE2 pins must be connected together.
2) All GND1 pins must be connected together.
Voltage Class Function
5V Secondary
5V Secondary
Reserved
5V Secondary
Ground
Reserved
5V Primary
5V Primary
5V Primary
5V Primary
Reserved
5V Primary
5V Primary
5V Primary
5V Primary
Ground
5V Primary
5V Primary
Supply
5V Primary
Active Clamping Disable Output.
Output Stage Disable Input.
Reserved. This pin shall be connected to GND2.
V_CC2 not valid notification output.
Ground²⁾.
Reserved. This pin shall be connected to GND1.
SPI Serial Clock Input.
SPI Serial Data Input.
SPI Chip Select Input (low active).
SPI Serial Data Output.
Reserved. This pin shall be connected to GND1.
Fault B Output (low active, open drain).
Fault A Output (low active, open drain).
Reset Input (low active, open drain). This signal
notifies that the device is “ready”.
Enable Input.
Reference Ground for signals INP, INSTP, EN.
Positive PWM Input.
Monitoring PWM Input.
Positive Power Supply.
External Reference Input.
Datasheet
15
Hardware Description
Rev. 3.1, 2015-07-30