MC908GR8CDWE Datasheet, PDF (94/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Break Module (BRK)
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
6.4.3 TIMI and TIM2 During Break Interrupts
A break interrupt stops the timer counters.
6.4.4 COP During Break Interrupts
The COP is disabled during a break interrupt when V_TST is present on
the RST pin.
6.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
6.5.1 Wait Mode
If enabled, the break module is active in wait mode. In the break routine,
the user can subtract one from the return address on the stack if SBSW
is set. See Low Power Modes. Clear the BW bit by writing logic 0 to it.
6.5.2 Stop Mode
A break interrupt causes exit from stop mode and sets the SBSW bit in
the break status register.
6.6 Break Module Registers
These registers control and monitor operation of the break module:
• Break status and control register (BRKSCR)
• Break address register high (BRKH)
Technical Data
94
MC68HC908GR8 — Rev 4.0
Break Module (BRK)
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