MC908GR8CDWE Datasheet, PDF (108/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGMC)
this table:
Frequency Range
E
0 < f_VCLK < 9,830,400
0
9,830,400 ≤ f_VCLK < 19,660,800
1
19,660,800 ≤ f_VCLK < 39,321,600
2
NOTE: Do not program E to a value of 3.
8. Select a VCO linear range multiplier, L, where f_NOM = 38.4 kHz
L
=
ro
un

d

2----^E--f--V-×^{---C--f-LN---K-}_O^----_M^{---}
9. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency, f_VRS. The center-of-range frequency is
the midpoint between the minimum and maximum frequencies
attainable by the PLL.
f_VRS = (L × 2^E)f_NOM
For proper operation,
f_VRS – f_VCLK ≤ -^f-^N----^O----^M--₂----^×-----²---^E--
NOTE:
10. Verify the choice of P, R, N, E, and L by comparing f_VCLK to f_VRS
and f_VCLKDES. For proper operation, f_VCLK must be within the
application’s tolerance of f_VCLKDES, and f_VRS must be as close as
possible to f_VCLK.
Exceeding the recommended maximum bus frequency or VCO
frequency can crash the MCU.
11. Program the PLL registers accordingly:
a. In the PRE bits of the PLL control register (PCTL), program
the binary equivalent of P.
b. In the VPR bits of the PLL control register (PCTL), program
the binary equivalent of E.
Technical Data
108
MC68HC908GR8 — Rev 4.0
Clock Generator Module (CGMC)
For More Information On This Product,
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