MC908GR8CDWE Datasheet, PDF (114/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Clock Generator Module (CGMC)
7.6 CGMC Registers
These registers control and monitor operation of the CGMC:
• PLL control register (PCTL)
(See PLL Control Register.)
• PLL bandwidth control register (PBWC)
(See PLL Bandwidth Control Register.)
• PLL multiplier select register high (PMSH)
(See PLL Multiplier Select Register High.)
• PLL multiplier select register low (PMSL)
(See PLL Multiplier Select Register Low.)
• PLL VCO range select register (PMRS)
(See PLL VCO Range Select Register.)
• PLL reference divider select register (PMDS)
(See PLL Reference Divider Select Register.)
Figure 7-3 is a summary of the CGMC registers.
Addr. Register Name
Bit 7
6
5
4
3
$0036
Read:
PLL Control Register
(PCTL)
Write:
Reset:
PLLIE
0
PLLF
PLLON BCS
0
1
0
PRE1
0
Read:
LOCK
0
0
$0037
PLL Bandwidth Control
Register (PBWC)
Write:
AUTO
ACQ
Reset: 0
0
0
0
0
Read: 0
0
0
0
$0038
PLL Multiplier Select High
Register (PMSH)
Write:
MUL11
Reset: 0
0
0
0
0
Read:
$0039
PLL Multiplier Select Low
Register (PMSL)
Write:
Reset:
MUL7
0
MUL6
1
MUL5
0
MUL4
0
MUL3
0
Figure 7-3. CGMC I/O Register Summary
2
PRE0
0
0
0
MUL10
0
MUL2
0
1
VPR1
0
0
0
MUL9
0
MUL1
0
Bit 0
VPR0
0
R
0
MUL8
0
MUL0
0
Technical Data
114
MC68HC908GR8 — Rev 4.0
Clock Generator Module (CGMC)
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