MC908GR8CDWE Datasheet, PDF (224/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Input/Output Ports (I/O)
16.6.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software
configurable pullup device for each of the seven port D pins. Each bit is
individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and
dynamically disabled when a port bit’s DDRD is configured for output
mode.
Address: $000F
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 16-16. Port D Input Pullup Enable Register (PTDPUE)
PTDPUE6–PTDPUE0 — Port D Input Pullup Enable Bits
These writeable bits are software programmable to enable pullup
devices on an input port bit.
1 = Corresponding port D pin configured to have internal pullup
0 = Corresponding port D pin has internal pullup disconnected
Technical Data
224
MC68HC908GR8 — Rev 4.0
Input/Output Ports (I/O)
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