MC908GR8CDWE Datasheet, PDF (196/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Monitor ROM (MON)
Table 15-2 summarizes the differences between user mode and monitor
mode.
Modes
User
Monitor
Table 15-2. Mode Differences
Reset
Vector
High
$FFFE
$FEFE
Reset
Vector
Low
$FFFF
$FEFF
Functions
Break
Vector
High
Break
Vector
Low
$FFFC $FFFD
$FEFC $FEFD
SWI
Vector
High
$FFFC
$FEFC
SWI
Vector
Low
$FFFD
$FEFD
15.4.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
START
BIT BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
NEXT
START
BIT 6 BIT 7 STOP BIT
BIT
Figure 15-3. Monitor Data Format
15.4.3 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
Technical Data
196
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO
01234567
01234567
Figure 15-4. Break Transaction
MC68HC908GR8 — Rev 4.0
Monitor ROM (MON)
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