MC908GR8CDWE Datasheet, PDF (272/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
System Integration Module (SIM)
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources
Table 19-1 shows the internal signal names used in this section.
STOP/WAIT
CONTROL
SIM
COUNTER
÷2
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO CGM)
COP CLOCK
CGMXCLK (FROM CGM)
CGMOUT (FROM CGM)
RESET
PIN LOGIC
V_DD
INTERNAL
PULLUP
DEVICE
CLOCK
CONTROL
CLOCK GENERATORS
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
RESET
INTERNAL CLOCKS
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT CONTROL
AND PRIORITY DECODE
INTERRUPT SOURCES
CPU INTERFACE
Figure 19-1. SIM Block Diagram
Technical Data
272
MC68HC908GR8 — Rev 4.0
System Integration Module (SIM)
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