MC908GR8CDWE Datasheet, PDF (43/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Memory Map
Input/Output (I/O) Section
Addr. Register Name
Timer 1 Channel 1 Status ^Read:
$0028 and Control Register Write:
(T1SC1) _Reset:
$0029
Read:
Timer 1 Channel 1
Register High (T1CH1H)
Write:
Reset:
$002A
Read:
Timer 1 Channel 1
Register Low (T1CH1L)
Write:
Reset:
Read:
$002B
Timer 2 Status and Control
Register (T2SC)
Write:
Reset:
Read:
$002C
Timer 2 Counter Register
High (T2CNTH)
Write:
Reset:
Read:
$002D
Timer 2 Counter Register
Low (T2CNTL)
Write:
Reset:
Read:
$002E
Timer 2 Counter Modulo
Register High (T2MODH)
Write:
Reset:
$002F
Read:
Timer 2 Counter Modulo
Register Low (T2MODL)
Write:
Reset:
Timer 2 Channel 0 Status ^Read:
$0030 and Control Register Write:
(T2SC0) _Reset:
$0031
Read:
Timer 2 Channel 0
Register High (T2CH0H)
Write:
Reset:
Bit 7
CH1F
0
0
Bit 15
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
6
5
4
3
2
1
0
CH1IE
MS1A ELS1B ELS1A TOV1
0
0
0
0
0
0
14
13
12
11
10
9
Indeterminate after reset
6
5
4
3
2
1
Indeterminate after reset
0
0
TOIE TSTOP
TRST
PS2
PS1
0
1
0
0
0
0
14
13
12
11
10
9
0
0
0
0
0
0
6
5
4
3
2
1
0
0
0
0
0
0
14
13
12
11
10
9
1
1
1
1
1
1
6
5
4
3
2
1
1
1
1
1
1
1
CH0IE MS0B MS0A ELS0B ELS0A TOV0
0
0
0
0
0
0
14
13
12
11
10
9
Indeterminate after reset
= Unimplemented R = Reserved
U = Unaffected
Bit 0
CH1MAX
0
Bit 8
Bit 0
PS0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 8)
MC68HC908GR8 — Rev 4.0
MOTOROLA
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Technical Data
43